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<div class="header">
  <div class="headertitle"><div class="title">Flags Interrupts Management <div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___r_c_c.html">RCC</a> &raquo; <a class="el" href="group___r_c_c___exported___macros.html">RCC Exported Macros</a></div></div></div>
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<p>macros to manage the specified RCC Flags and interrupts.  
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga180fb20a37b31a6e4f7e59213a6c0405" id="r_ga180fb20a37b31a6e4f7e59213a6c0405"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga180fb20a37b31a6e4f7e59213a6c0405">__HAL_RCC_ENABLE_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:ga180fb20a37b31a6e4f7e59213a6c0405"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable RCC interrupt.  <br /></td></tr>
<tr class="memitem:gafc4df8cd4df0a529d11f18bf1f7e9f50" id="r_gafc4df8cd4df0a529d11f18bf1f7e9f50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gafc4df8cd4df0a529d11f18bf1f7e9f50">__HAL_RCC_DISABLE_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:gafc4df8cd4df0a529d11f18bf1f7e9f50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable RCC interrupt.  <br /></td></tr>
<tr class="memitem:ga9d8ab157f58045b8daf8136bee54f139" id="r_ga9d8ab157f58045b8daf8136bee54f139"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga9d8ab157f58045b8daf8136bee54f139">__HAL_RCC_CLEAR_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:ga9d8ab157f58045b8daf8136bee54f139"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the RCC's interrupt pending bits.  <br /></td></tr>
<tr class="memitem:ga134af980b892f362c05ae21922cd828d" id="r_ga134af980b892f362c05ae21922cd828d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga134af980b892f362c05ae21922cd828d">__HAL_RCC_GET_IT</a>(__INTERRUPT__)</td></tr>
<tr class="memdesc:ga134af980b892f362c05ae21922cd828d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check the RCC's interrupt has occurred or not.  <br /></td></tr>
<tr class="memitem:gaf28c11b36035ef1e27883ff7ee2c46b0" id="r_gaf28c11b36035ef1e27883ff7ee2c46b0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gaf28c11b36035ef1e27883ff7ee2c46b0">__HAL_RCC_CLEAR_RESET_FLAGS</a>()</td></tr>
<tr class="memdesc:gaf28c11b36035ef1e27883ff7ee2c46b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set RMVF bit to clear the reset flags.  <br /></td></tr>
<tr class="memitem:ga80017c6bf8a5c6f53a1a21bb8db93a82" id="r_ga80017c6bf8a5c6f53a1a21bb8db93a82"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga80017c6bf8a5c6f53a1a21bb8db93a82">RCC_FLAG_MASK</a>&#160;&#160;&#160;((uint8_t)0x1F)</td></tr>
<tr class="memdesc:ga80017c6bf8a5c6f53a1a21bb8db93a82"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check RCC flag is set or not.  <br /></td></tr>
<tr class="memitem:gae2d7d461630562bf2a2ddb31b1f96449" id="r_gae2d7d461630562bf2a2ddb31b1f96449"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gae2d7d461630562bf2a2ddb31b1f96449">__HAL_RCC_GET_FLAG</a>(__FLAG__)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<p>macros to manage the specified RCC Flags and interrupts. </p>
<a name="doc-define-members" id="doc-define-members"></a><h2 id="header-doc-define-members" class="groupheader">Macro Definition Documentation</h2>
<a id="ga9d8ab157f58045b8daf8136bee54f139" name="ga9d8ab157f58045b8daf8136bee54f139"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9d8ab157f58045b8daf8136bee54f139">&#9670;&#160;</a></span>__HAL_RCC_CLEAR_IT</h2>

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          <td class="memname">#define __HAL_RCC_CLEAR_IT</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__INTERRUPT__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">(RCC-&gt;CICR = (__INTERRUPT__))</div>
</div><!-- fragment -->
<p>Clear the RCC's interrupt pending bits. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__INTERRUPT__</td><td>specifies the interrupt pending bit to clear. This parameter can be any combination of the following values: <ul>
<li>RCC_IT_LSIRDY: LSI ready interrupt </li>
<li>RCC_IT_LSERDY: LSE ready interrupt </li>
<li>RCC_IT_CSIRDY: CSI ready interrupt </li>
<li>RCC_IT_HSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSERDY: HSE ready interrupt </li>
<li>RCC_IT_HSI48RDY: HSI48 ready interrupt </li>
<li>RCC_IT_PLLRDY: main PLL ready interrupt </li>
<li>RCC_IT_PLL2RDY: PLL2 ready interrupt </li>
<li>RCC_IT_PLL3RDY: PLL3 ready interrupt </li>
<li>RCC_IT_HSECSS: HSE Clock Security interrupt </li>
<li>RCC_IT_LSECSS: Clock security system interrupt </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gaf28c11b36035ef1e27883ff7ee2c46b0" name="gaf28c11b36035ef1e27883ff7ee2c46b0"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf28c11b36035ef1e27883ff7ee2c46b0">&#9670;&#160;</a></span>__HAL_RCC_CLEAR_RESET_FLAGS</h2>

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          <td class="memname">#define __HAL_RCC_CLEAR_RESET_FLAGS</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">(RCC-&gt;RSR |= RCC_RSR_RMVF)</div>
</div><!-- fragment -->
<p>Set RMVF bit to clear the reset flags. </p>

</div>
</div>
<a id="gafc4df8cd4df0a529d11f18bf1f7e9f50" name="gafc4df8cd4df0a529d11f18bf1f7e9f50"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafc4df8cd4df0a529d11f18bf1f7e9f50">&#9670;&#160;</a></span>__HAL_RCC_DISABLE_IT</h2>

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        <tr>
          <td class="memname">#define __HAL_RCC_DISABLE_IT</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__INTERRUPT__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">CLEAR_BIT(RCC-&gt;CIER, (__INTERRUPT__))</div>
</div><!-- fragment -->
<p>Disable RCC interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__INTERRUPT__</td><td>specifies the RCC interrupt sources to be disabled. This parameter can be any combination of the following values: <ul>
<li>RCC_IT_LSIRDY: LSI ready interrupt </li>
<li>RCC_IT_LSERDY: LSE ready interrupt </li>
<li>RCC_IT_CSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSERDY: HSE ready interrupt </li>
<li>RCC_IT_HSI48RDY: HSI48 ready interrupt </li>
<li>RCC_IT_PLLRDY: main PLL ready interrupt </li>
<li>RCC_IT_PLL2RDY: PLL2 ready interrupt </li>
<li>RCC_IT_PLL3RDY: PLL3 ready interrupt </li>
<li>RCC_IT_LSECSS: Clock security system interrupt </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="ga180fb20a37b31a6e4f7e59213a6c0405" name="ga180fb20a37b31a6e4f7e59213a6c0405"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga180fb20a37b31a6e4f7e59213a6c0405">&#9670;&#160;</a></span>__HAL_RCC_ENABLE_IT</h2>

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        <tr>
          <td class="memname">#define __HAL_RCC_ENABLE_IT</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__INTERRUPT__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(RCC-&gt;CIER, (__INTERRUPT__))</div>
</div><!-- fragment -->
<p>Enable RCC interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__INTERRUPT__</td><td>specifies the RCC interrupt sources to be enabled. This parameter can be any combination of the following values: <ul>
<li>RCC_IT_LSIRDY: LSI ready interrupt </li>
<li>RCC_IT_LSERDY: LSE ready interrupt </li>
<li>RCC_IT_CSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSERDY: HSE ready interrupt </li>
<li>RCC_IT_HSI48RDY: HSI48 ready interrupt </li>
<li>RCC_IT_PLLRDY: main PLL ready interrupt </li>
<li>RCC_IT_PLL2RDY: PLL2 ready interrupt </li>
<li>RCC_IT_PLL3RDY: PLL3 ready interrupt </li>
<li>RCC_IT_LSECSS: Clock security system interrupt </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
<a id="gae2d7d461630562bf2a2ddb31b1f96449" name="gae2d7d461630562bf2a2ddb31b1f96449"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae2d7d461630562bf2a2ddb31b1f96449">&#9670;&#160;</a></span>__HAL_RCC_GET_FLAG</h2>

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          <td class="memname">#define __HAL_RCC_GET_FLAG</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__FLAG__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">(((((((__FLAG__) &gt;&gt; 5U) == 1U)? RCC-&gt;CR :((((__FLAG__) &gt;&gt; 5U) == 2U) ? RCC-&gt;BDCR : \</div>
<div class="line">((((__FLAG__) &gt;&gt; 5U) == 3U)? RCC-&gt;CSR : ((((__FLAG__) &gt;&gt; 5U) == 4U)? RCC-&gt;RSR :RCC-&gt;CIFR))))  &amp; (1UL &lt;&lt; ((__FLAG__) &amp; <a class="code hl_define" href="#ga80017c6bf8a5c6f53a1a21bb8db93a82">RCC_FLAG_MASK</a>)))!= 0U)? 1U : 0U)</div>
<div class="ttc" id="agroup___r_c_c___flags___interrupts___management_html_ga80017c6bf8a5c6f53a1a21bb8db93a82"><div class="ttname"><a href="#ga80017c6bf8a5c6f53a1a21bb8db93a82">RCC_FLAG_MASK</a></div><div class="ttdeci">#define RCC_FLAG_MASK</div><div class="ttdoc">Check RCC flag is set or not.</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_rcc.h:7942</div></div>
</div><!-- fragment -->
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<a id="ga134af980b892f362c05ae21922cd828d" name="ga134af980b892f362c05ae21922cd828d"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga134af980b892f362c05ae21922cd828d">&#9670;&#160;</a></span>__HAL_RCC_GET_IT</h2>

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        <tr>
          <td class="memname">#define __HAL_RCC_GET_IT</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__INTERRUPT__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">((RCC-&gt;CIFR &amp; (__INTERRUPT__)) == (__INTERRUPT__))</div>
</div><!-- fragment -->
<p>Check the RCC's interrupt has occurred or not. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__INTERRUPT__</td><td>specifies the RCC interrupt source to check. This parameter can be any combination of the following values: <ul>
<li>RCC_IT_LSIRDY: LSI ready interrupt </li>
<li>RCC_IT_LSERDY: LSE ready interrupt </li>
<li>RCC_IT_CSIRDY: CSI ready interrupt </li>
<li>RCC_IT_HSIRDY: HSI ready interrupt </li>
<li>RCC_IT_HSERDY: HSE ready interrupt </li>
<li>RCC_IT_HSI48RDY: HSI48 ready interrupt </li>
<li>RCC_IT_PLLRDY: main PLL ready interrupt </li>
<li>RCC_IT_PLL2RDY: PLL2 ready interrupt </li>
<li>RCC_IT_PLL3RDY: PLL3 ready interrupt </li>
<li>RCC_IT_HSECSS: HSE Clock Security interrupt </li>
<li>RCC_IT_LSECSS: Clock security system interrupt </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">The</td><td>new state of <b>INTERRUPT</b> (TRUE or FALSE). </td></tr>
  </table>
  </dd>
</dl>

</div>
</div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga80017c6bf8a5c6f53a1a21bb8db93a82">&#9670;&#160;</a></span>RCC_FLAG_MASK</h2>

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          <td class="memname">#define RCC_FLAG_MASK&#160;&#160;&#160;((uint8_t)0x1F)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Check RCC flag is set or not. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__FLAG__</td><td>specifies the flag to check. This parameter can be one of the following values: <ul>
<li>RCC_FLAG_HSIRDY: HSI oscillator clock ready </li>
<li>RCC_FLAG_HSIDIV: HSI divider flag </li>
<li>RCC_FLAG_CSIRDY: CSI oscillator clock ready </li>
<li>RCC_FLAG_HSI48RDY: HSI48 oscillator clock ready </li>
<li>RCC_FLAG_HSERDY: HSE oscillator clock ready </li>
<li>RCC_FLAG_D1CKRDY: Domain1 clock ready (*) </li>
<li>RCC_FLAG_D2CKRDY: Domain2 clock ready (*) </li>
<li>RCC_FLAG_CPUCKRDY: CPU Domain clock ready (CPU, APB3, bus matrix1 and related memories) (*) </li>
<li>RCC_FLAG_CDCKRDY: CPU Domain clock ready (*) </li>
<li>RCC_FLAG_PLLRDY: PLL1 clock ready </li>
<li>RCC_FLAG_PLL2RDY: PLL2 clock ready </li>
<li>RCC_FLAG_PLL3RDY: PLL3 clock ready </li>
<li>RCC_FLAG_LSERDY: LSE oscillator clock ready </li>
<li>RCC_FLAG_LSIRDY: LSI oscillator clock ready </li>
<li>RCC_FLAG_CPURST: CPU reset flag </li>
<li>RCC_FLAG_D1RST: D1 domain power switch reset flag (*) </li>
<li>RCC_FLAG_D2RST: D2 domain power switch reset flag (*) </li>
<li>RCC_FLAG_CDRST: CD domain power switch reset flag (*) </li>
<li>RCC_FLAG_BORRST: BOR reset flag </li>
<li>RCC_FLAG_PINRST: Pin reset </li>
<li>RCC_FLAG_PORRST: POR/PDR reset </li>
<li>RCC_FLAG_SFTRST: System reset from CPU reset flag </li>
<li>RCC_FLAG_BORRST: D2 domain power switch reset flag </li>
<li>RCC_FLAG_IWDG1RST: CPU Independent Watchdog reset </li>
<li>RCC_FLAG_WWDG1RST: Window Watchdog1 reset </li>
<li>RCC_FLAG_LPWR1RST: Reset due to illegal D1 DSTANDBY or CPU CSTOP flag </li>
<li>RCC_FLAG_LPWR2RST: Reset due to illegal D2 DSTANDBY flag </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>
<dl class="retval"><dt>Return values</dt><dd>
  <table class="retval">
    <tr><td class="paramname">The</td><td>new state of <b>FLAG</b> (TRUE or FALSE).</td></tr>
  </table>
  </dd>
</dl>
<p>(*) Available on some STM32H7 lines only. </p>

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